I/O INTERFACING WITH 8085
Example 3:
A system requires 8kb EPROM and 8kb RAM. Also the system has 2 numbers of 8155. Draw the Interface diagram. Allocate addresses to all the devices. The peripheral IC should be I/O mapped.
- The IC 2764 (8k x 8) is selected for EPROM memory and IC 6264 (8k x 8) is selected for RAM memory. Both the memory IC has time compatibility with 8085 processor.
- The 8kb memory requires 13 address lines. Hence the address lines A0 - A12 are used to select memory locations.
- The RAM locations of 8155 are selected by address lines A0 to A7.
- 3-to-8 decoder, 74LS138 is used for generating chip select signals by decoding the address lines A13, A14 and A15.
- Eight bit addresses are allotted to ports of 8l55 and sixteen bit addresses are allotted to RAM memory locations of 8155.
Fig - Memory and I/O Port Interfacing with 8085
