D7705 is AD's new 16-bit S-?A / D converter. Device including buffer and programmable gain amplifier (PGA) front-end analog conditioning circuitry comprising, S-? modulator, programmable digital filters and other components. Directly to the multi-sensor measurements to the small signal A / D conversion. This device also has a high resolution, wide dynamic range, self-calibration, excellent noise immunity and low-voltage low power consumption, ideal for instrumentation and measurement, industrial control and other fields. It uses three-wire serial, two fully differential input channels, can achieve 16-bit linear 0.003% error-free data output, the gain and output update rate programmable data can also select the input analog buffer and the self-calibration and system calibration. Operating voltage 3 V or 5 V. 3 V voltage, maximum power consumption of 1 mW, waiting mode, supply current of only 8 µA.

An internal structure

AD7705 is a complete 16-bit A / D converter. Internal structure shown in Figure 1. If an external crystal oscillator, precision reference source and a small amount of decoupling capacitors, can be continuously carried out A / D conversion. It uses low cost, but can get very high resolution S-? converter technology, can be error-free 16-bit data output. This is very consistent with the resolution, but require a higher number of less demanding applications on the conversion, such as digital audio products and intelligent instrumentation products. The following key components of the device and features a brief description. 

AD7705 programmable gain amplifier includes two fully differential analog input channels. On-chip programmable gain amplifier PGA gain select 1,2,4,8,16,32,64,128 one of eight, can swing range of different types of input signal amplification close to A / D converter The full scale voltage to conduct A / D conversion, this will help improve the conversion quality. When the supply voltage is 5 V, 2.5 V reference voltage, the device can be directly received from 0 ~ 20 mV to 0 ~ 2.5 V unipolar signal swing range and from 0 ~ ± 20 mV to 0 ~ ± 2.5 V range bipolar signals. Must be pointed out: here is a negative voltage relative to AIN (-) pins for the purposes of these two pins should be biased to the positive potential on the right. Applied to any pin of the device relative to the GND to the negative voltage signal is not allowed. Input analog signal is A / D converter continuous sampling, the sampling frequency fS fCLK by the master clock frequency and selected gain decision. Gain (16 ~ 128) through the use of multiple sampling and reference capacitor and input capacitance ratio of common to get.

Update rate digital filtering and analog signal output from the S-? modulator is converted to analog voltage duty cycle modulation (width-modulated) digital pulse train, and then in the on-chip low-pass digital filter used to interpret 16-bit binary digital and to filter out noise, to complete the A / D conversion. AD7705 uses a (sinNx / sinx) 3 ? function low-pass digital filter, the amplitude frequency characteristics are as follows:

Where: N is the modulation rate and the ratio of the output update rate. ? be pointed out that the main sources of noise generated by the device from the semiconductor noise and quantization noise, PGA put the first notch filter is large and the lower the frequency, the output of semiconductor noise and the smaller the quantization noise, A / D converter, the actual resolution rate.
calibration and self-calibration to improve the A / D conversion quality, AD7705 provides two kinds of self-calibration and system calibration function selection. When the ambient temperature and voltage change, or change the working status of the device, such as input channel switching, gain, or the digital filter first notch frequency changes, the signal input range of any of the changes occurred, the need for a calibration. For the self-calibration, the calibration process within the device at once. AD7705 internally set AIN (+) terminal and AIN (-) terminal to the same bias voltage to zero-scale calibration; full-scale calibration resulting in an internal VREF voltage and the selected conditions of the gain. Criteria for the school system the whole system gain error and offset error, including calibration of the device internal error. Under the selected gain, has the external to the AIN (+) terminal to impose zero-scale voltage and full-scale voltage, the first zero-scale calibration point, and then full-scale calibration point. According to zero-scale and full-scale calibration data, the calculation of on-chip input and output of the converter transfer function of the offset and gain slope to compensate for the error.

AD7705 serial digital interface includes five interface, data interfaces, including chip select input CS, the serial clock input SCLK, the data input DIN, data output DOUT conversion for transmitting data, state signal output when the output data is used to indicate register data is ready. When is low, the conversion data is available; When is high, the output data register is being updated, can not read the data. Devices A / D conversion process is based on the data set of continuous output update rate. Any action needs to register on the corresponding chip into the new programming instructions.

This article related DataSheet:

AD7705 includes on-chip registers 8 registers, all serial port access through the device. The first is the communication register, the contents of its next operation is to determine which register to read or write operation, and control which input channels are sampled. All communications with the device registers must be written communication. After power-up or reset, the device default state is waiting for written communication instruction data register. Its register select bit RS2 ~ RS0 determine what the next operation to access a register, and input channel selection bits CH1, CH0, decided which of the input channel A / D conversion or access to calibration data. Section 2 is to set registers, it is a read / write 8-bit register used to set the operating mode, calibration mode, gain and so on. Section 3 is the clock register, it is also a read / write 8-bit register used to set parameters and operating frequency on AD7705 A / D converter output update rate. Section 4 is the data register, which is a 16-bit read-only register that store the latest result of the conversion AD7705. It should be noted that although the data sheet indicates that it is a 16-bit register, but in fact it is composed of two 8-bit storage modules, the output MSB first, LSB first if the receiver needs, such as 8051 series, should be read in two reading time, each 8 bits are read out in reverse order, rather than the entire 16-bit reverse. Other registers are test registers, zero-scale calibration register, the full-scale calibration registers, etc., for testing and storage of calibration data can be used to analyze noise and conversion error. 

2 Microcontroller Application Examples

AD7705 with SPI / QSPI compatible three-wire serial interface that easily with a variety of microcontrollers and DSP connection, than the parallel interface mode saves the CPU's I / O port. Application circuit shown below, using 80C51 control AD7705, on the bridge sensor signal analog-digital conversion. This program uses two-wire connections send and receive data. CS received AD7705's low. DRDY by monitoring the status of DRDY line be connected to P32 (also available through access to communication register in order to save DRDY bit to determine an I / O port.) The application used to generate the same power supply and the AD7705 sensor bridge excitation voltage reference reference voltage, so the change in voltage when they are affected the same proportion, no systematic error, thus reducing the requirements for voltage stability . This is the alternative to expensive high-precision reference voltage circuit

Without reducing the performance of general practice. 80C51 mode 0 configuration for the serial interface mode. The data serial line RXD (P3 ? 0) and AD7705 the DIN, DOUT pins connected together, and then a 10 kO pull-up resistor. TXD with the AD7705's clock interface SCLK (P31) connected to transmit data clock. No data transmission, TXD is high idle.

Should be noted that with the read operation is similar to the write operation mode, 80C51 data output for the LSB first, while the AD7705 hope MSB first, so the data must be written before the reverse. Here are a few key C51 functions.