Abstract: This paper presents a synchronization -based high-speed USB2.0 interface design and data acquisition hardware and software design methods , the USB2.0 controller chip on the Cypress CY7C68013 and synchronous data acquisition chip AD7862 features described briefly at the same time Focuses on the design of CPIP and its driver software . With the rapid development of computer technology , external bus speed of the increasingly high demand . Universal Serial Bus (Universal Serial Bus, or USB bus) , with its Plug & Play , hot swap and the advantages of high transmission rate , a PC- peripheral connections with the universal standard . In many portable computers have been unable to find RS-232 interfaces . To date, the common USB bus standards USBl.1 version released in 1998 , and USB2.0 version released in 2000 . One version 1.1 supports two data rates : 1.5Mbps and 12Mbps, mainly used in low-speed transmission is a requirement ; and 2.0 for high data rate transmission of occasions , to support 480Mbps transfer rate , fully compatible with USBl.1 agreement to the next . In practice , often encounter some unexpected signals, necessary for its high-speed acquisition, high-speed data transmission, so a natural choice for USB2.0 standard . With Cypress 's EZ-USB FX2 series as the core controller CY7C68013 chip , designed and developed a set of standards consistent with USB2.0 high-speed synchronous data acquisition .
1 CY7C68013 chip
Cypress 's EZ-USB FX2 series CY7C68013, is the relatively small market of the USB controllers comply with USB2.0 standard one . Compared with other similar chip , which provides 4KB of FIFO and a very strong function of GPIF (General Programmable Interface) module . The latter is equivalent to a programmable state machine , because of its presence , makes the CY7C68013 chip than other similar capacity with strong connectivity . Figure 1 is a schematic CY7C68013 chip structure , its main features are as follows :
CY7C68013 incorporates an enhanced interior with 51 cores , the instruction set is compatible with standard 8051 , and in many ways improved. For example: The maximum operating frequency up to 48MHz, an instruction cycle is four clock cycles , two UART interfaces , and three time counters, an I2C interface, engine and so on .
CY7C68013 provides a serial interface engine (SIE), is responsible for the completion of the majority of USB2.0 protocol processing , thereby greatly reducing the workload USB protocol processing , and provides 4KB of FIFO to ensure high-speed data transmission needs. * In order to meet different types of peripherals and connectivity needs , chip integrates a GPIF module so users can follow peripheral timing waveform editing , without the need for complex procedures described , we can ensure that GPIF and internal . FIFO Coordination to achieve chip and high speed peripheral devices and high speed logical connections between data transmission. This developer is very friendly . The author is to use this feature , high-speed synchronization of data acquisition and transmission .
Figure 1
2 synchronous high speed data acquisition chip AD7862
2.1 AD7862 structure
AD7862 is AD Launches the speed , low power, bipolar 12-bit A / D conversion chip , which contains two separate fast ADC module ( allows simultaneous sampling and converting the two signals ), 4 analog input signals (VAl, VA2, VBl, VB2), 2.5V internal voltage reference and a 12-bit High-speed parallel interface. Chip power consumption during normal operation is only 60mW, when using power saving mode, only 50μW, own power supply for low-power USB device that is undoubtedly a virtue.
The chip's internal structure shown in Figure 2 below. Each ADC has a two-channel MUX chip address signal A0 through the respective strobe VAl, VA2 or VBl, VB2, when a CONVST signal arrives, also converted address signals A0 to select the two.
2.2 AD7862 to control the timing
D7862 control sequence shown in Figure 3. In the USB2.0 high-speed synchronous data acquisition, the use of GPIF achieve timing control shown in Figure 3. Which is the conversion started CONVST signal falling edge trigger for two-way ADC Start loading; BUSY signal CONVST signal triggered; become and remain high electron state until the two-way ADC conversion is completed, it returned to low; Address A0 is used to select the two analog signals, CS signal and the RD signal are chip enable signal and the time to allow the signal. The first two are both low, ADC conversion read out the first set of data; in the second is high, the read out second ADC conversion data. Using the AD7862 is worth noting that the chip delivers the power management features, when the chip is the second input, data read is granted, CONVST will amke the chip to go to sleep mode. Then the chip power consumption is only 50μW. This is very important for portable devices now.
3. Synchronous high-speed data acquisition device hardware:
The traditional high-speed data acquisition card with PCI bus design generally , but notebook computers, and most of the portable device is no PCI slot . Using USB2.0 technology, not only guarantees a high data transfer rate ( the maximum transfer rate up to 480Mbps), but also a portable and no external power supply and so on. Figure 4 Schematic diagram of the system . Its working principle is: GPIF module under the control of the AD7862 sampling interval of the target JGPIF sent to the CY7C68013. FIFO in the buffer ; Dang after certain amount of data collected , CY7C68013 routinely and automatically package ( do not need the intervention of 8051 ), transferred to the PC through the USB bus data processing machine . Because GPIF hardware support , CY7C68013 in the 8051 core only a few hours , the control of a secondary treatment , most of the work completed by the GPIF hardware . This 8051 is also interconnected with other peripherals and so on. In the high-speed data acquisition system to attach a two-way RS-232 interface for the GPS data and high-precision smart -sounder data to the host computer , the great convenience to the newly launched notebook computers and peripherals between the traditional Ties. Because most of the newly launched laptop does not have RS-232 interface, but most of those who can only field observation instrument RS-232 interface for data exchange .
For the CY7C68013 , its configuration and firmware are soft, are stored in external E2PROM in power automatically loaded from the I2C bus to the on-chip RAM , the changes very convenient, easy firmware upgrades . As the CY7C68013 provides rich I / O ports, so a function expansion is also very convenient , for example, an additional data port and so on GPIB .
4.Software design
USB device software design includes three aspects: firmware design, hardware driver design and advanced design applications .
4.1 firmware (firmware) design
Cypress CY7C68013 company provides a development framework , can be developed under the environment in the KEIL C51 . Since the introduction of the development framework , which greatly reduces the user's development cycle . The framework consists of the following components:
(1) FW.C contains procedural framework MAIN function , the management of 51 cores to run , because this part of Cypress 's functions were carefully divided , generally without changes .
(2 ) the user must PERIPH.C instantiated , it is responsible for peripheral devices interconnected system . Firmware design mainly for the file , the user needs to be according to their own systems , examples of this paper to realize their own capabilities . In this document there are several functions are more crucial to do some special instructions here :
TD_Init function, responsible for the USB endpoints to initialize settings . This design will set the endpoint 6, 1024 bytes , the cache depth is 4 , the mode is set automatically input.
TD_Poll function, responsible for the task of handling the system cycle . It is primarily a state of each endpoint to query , deal with OUT or IN endpoint interaction. Worthy of note is that this treatment is only secondary in nature , most of the work done automatically by the hardware .
DR_VendorCmnd function , is responsible for user-defined command decoding work , the user requests transmitted to the core by O endpoint . CY7C68013 on the SIE as hardware support, users can simply check a fixed address receive the current command unit code .
GPIFINIT.C, of which only one Gpiflnit function ; it is GPIF module initialization function , usually in TD_Init a function . This function is provided by the Cypress a GPIF Designer development tool designed waveform based on user generated , users do not need to design the waveform lookup table , thereby reducing the intensity of the designer 's work .
DSCR.A51 is to describe the table file , for a description of USB devices work , CY7C68013 in the power automatically take advantage of the VID and PID to replace the default VID and PID.
* 2 contains the files EZUSB.LIB and USBJMPTB.OBJ, former EZUSB library binary file , which is a USB interrupt vector table . Firmware debugging , use the provided Cypress EZ-USB control panel, the reader can refer to specific actions to help its own .
4.2 Design Drivers
Driver is responsible for access to the underlying hardware . In this design, driver development , the use of development tools is it supports operating systems. Development of the advantages of using WinDriver users do not need to understand the specific work within the operating system mechanism is not necessary to understand the different systems DDK (Developing or Debugging in Kernel) development tool , users simply use the WinDriver provides a development platform , to complete The design of the driver , leaving the underlying details of the WinDriver kernel centrally, which reduces the programming ability of the developer 's requirements , but also greatly shorten the development cycle. Following the use of WinDriver driver development to be a brief description of the steps (in the Windows operating system under development as an example)
(1 ) start WinDriver 's DriverWizard tools;
(2 ) whether the normal use of DriverWizard hardware detection ;
( 3) DriverWizard used to select the development environment , where the use VB6.0 development environment , and generate driver code ;
(4 ) modify the generated code , to meet the system requirements;
(5 ) in the WinDriver User mode environment , debugging the driver ; (6 ) If the program requires access to the kernel to improve the efficiency of the driver into the kernel development .
4.3 Advanced Application Design
Advanced applications built on top of the driver in the design, selected VB6.0 development environment to develop applications . It is a bridge driver , command and control of the USB equipment , processing the data returned USB equipment , such as waveform , frequency spectrum analysis. Developers can rely on its actual needs , to make a USB controller, control or data packets , in preparing the application to connect or embedded application. With the rapid popularity of notebook computers , high-performance portable data collection device will be high-profile , especially in the RS-232 interface has been abandoned by most notebook computers today, on the demand for USB data acquisition becomes even more urgent and Has shown a good market prospect . Described in this article based on USB2.0 high-speed synchronous data acquisition system is already on its function is not limited to data collection, it should be said is a powerful mixed-signal processors . After the underwater robot and sonar equipment , Zhejiang cage monitoring the use of that data throughput , performance, stability, and meets the design requirements . Only with the appropriate sensor and corresponding signal conditioning circuits , use of high-performance collector described in this article , it can be collected on a variety of analog and analytical processing. If we can design a suitable firmware , then it could form a multi-function control system.