Abstract : This paper describes the power consumption during high-precision calibration of measuring devices , digital signal processor TMS320F206 and PC, and industrial control (IPC) of the ISA bus, dual-port SRAM, high-precision A / D converter interface circuit Realization . Keywords : DSP IPC Interface Technology Power measuring device for carrying out routine check in , as check device, be sure to voltage , current amplitude , frequency, phase and other high-precision measurements , the calibration device using TI DSP device company TMS320F206 control A / D Conversion, data acquisition and digital filtering and the filtering of data after the data transmitted to the computer for further processing , to achieve a high precision meter calibration requirements. The composition and function of measurement unit Measurement unit as a system of high precision "standard form " , to be completed on the AC / DC voltage , current multiple power measurement, measurement accuracy is less than 0.05 , measurement unit to card design, direct??IPC ( Industrial Control PC ) of the ISA bus use . This module block diagram shown in Figure 1 . Including : A / D converter with BB 's ADS7805, which is 16-Bit, switching frequency up to 100KHz, the high-precision converter chip 28 -pin DIP or SMD double package, 16-bit conversion result Parallel output, start the conversion and reads the previous conversion results can at the same time , use it to complete the transformation of voltage and current signals of the A / D conversion; dual-port RAM with CY7133-25, it is a bilateral both 16-bit data bit The 2KBRAM, both sides of the chip can be separately accessed memory cells , respectively, in the circuit controlled by the DSP and the IPC, to achieve the IPC and the exchange of data between TMS320F206 ; zero compared with a LM339, to realize the exchange of v, I The zero-crossing detection , used to obtain calculated frequency , phase and other data signal. TI DSP is used in the company's 16-bit fixed-point DSP TMS320F206, computing speed 40MIPS, is a low -power devices , using a modified Harvard architecture , there is a process bus and three data bus , pipelined , highly parallel 32-bit arithmetic logic unit , 16 * 16-bit parallel hardware multiplier , on-chip memory , on-chip peripherals and highly specialized instruction set , allowing the chip , high-speed , flexible operation . On-chip resources include: internal clock generator , external clock source can be * 1 , * 2 , * 4 and / 2 to generate the CPU clock ; chip has RAM4.5K, Flash32K, can be suitable for many engineering applications , in particular, Is 32K Flash program memory as to system design and debugging process to bring great convenience ; three external interrupt INT1, INT2, INT; 1 synchronous serial port and an asynchronous serial port ; a software programmable timer ; JTAG scan Simulation Interface (IEEE standard) , used to achieve line simulation test; has four independent programmable I / O pin (I/O0, I/O1, I/O2, I/O3), 1 output and 1 foot XF Input pin / BIO. Since the implementation of DSP 's take that and run completely overlap , coupled with several stage pipeline operation , Zhuanyong the hardware multiplier, Teshu the DSP Zhi Ling and Zhou Qi Deng Jie Gou Kuaisu the instruction characteristics , Shide its Shuzichuli speed????, which also DSP and the external interface circuits and devices made some new requirements and problems in the design of DSP applications must be seriously considered. TMS320F206 and ISA bus interface Taking into account data processing system, the timeliness and relative independence , TMS320F206 and IPC data exchange is achieved through dual-port SRAM , interface circuit shown in Figure 2 . This part of the circuit interface , the main need to consider the following issues : (1) DSP on the dual-port SRAM read / write control TMS320F206 address lines A0-A10 , respectively , and CY7133 of A0L-A10L directly connected , F206 16- bit data lines and CY7133 respectively, the IO L0-10 directly connected . As a result of rapid dual-port SRAM, DSP without the need to consider adding wait states , R / / WE connected directly to RAM, R / W LU and R / W LL data read and write control , CY7133 the chip select signal / CEL by the / DS and A15 combinations generated can be seen from the diagram of the CY7133 addressing TMS320F206 Range 8000H-87FFH. Measurement unit with a three TMS320F206 measuring the composition of the same 3-way circuits were measured on the three-phase circuit (Figure 2, only to draw a Road). (2) IPC of the dual-port SRAM read / write control; IPC through the ISA bus on the dual-port SRAM read / write control method of directly addressable memory read and write . ISA bus are A0-A19 address lines can directly address 00000-FFFFFH, which C8000-EFFFFH reserved for the user, you can use as a memory expansion design . The circuit of the dual-port SRAM IPC read / write control , address lines, data lines , memory read (/ OE) and write (/ MEMW) control line connection shown in Figure 2 , the decoding circuit decoding are 3 group address select signal , D8000-D87FFH, D88000-D8FFFH, D9000-D97FFH were used as a 3-way dual-port RAM chip-select signal . (3 ) to avoid both sides of the same unit at the same time read / write operations Because the DSP and the IPC on the dual-port SRAM read / write is random, there may be in use simultaneously on both sides of the same unit on the SRAM read and write operations , causing read and write data errors. CY7133 either side of the / BUSY signal , when both sides of the device accessing the same storage unit, the signal / BUSY effective , said a visit to conflict. To be able to handle the access violation , shown in Figure 3, / BUSYL access TMS320F206 the READY signal pin , when READY is low , said the IPC had been in the same unit on the CY7133 read or write , TMS320F206 to make a slight delay and then the unit operation ; three-way CY7133 of / BUSYR signal through a gate 10 receiving the ISA bus interrupt IR10, any way / BUSYR effective immediately interrupt the IPC , said the DSP has the same unit in the SRAM read or write , IPC should be slightly To delay further action on the unit , thus achieving a normal TMS320F206 and IPC of dual port memory access . Note that , / BUSY pin must be connected to the pull-up resistor to work ( figure omitted ) . DSP and the connection was measured signal System was measured signal is mainly voltage, current amplitude , frequency and phase . Frequency and phase measurement by comparing the device 's interrupt pin access TMS320F206 , together with the internal timer that can measure and process , and is not to repeat . Amplitude measurement is to already by precision and reduced in proportion to transform voltage and current signals after the accurate measurement . To play a DSP, high-speed sampling of the measured signals and filtering , with two separately transformed ADS7805 same voltage and current signal sampling and A / D conversion , and then read and digital filtering , A / D conversion And the measuring circuit shown in Figure 3 . ADS7805 conversion results to complement that , the maximum bit symbols , 15 -bit data , the actual resolution of the data up to 1 / 32767 . Because of the A / D converter for control and reading are I / O operations , so, TMS320F206 the I / O control signal / IS and address of the line combination of decoding , the circuit , when TMS320F206 7XXX operate on the address , it will also Start 2 Way ADS7805 for A / D conversion; when to enter the address 2XXX , will read the conversion results of the measured voltage v ; when the address 4XXX for input , the measured current i will read the conversion result . Conclusion This interface circuit has been successfully used for high-precision meter calibration system , completely changed the traditional PC - on a single chip , the next bit plane calibration system serial communication mode , full use of existing computer software and hardware resources , to play A fast DSP digital signal processing in the features and advantages , a manufacturer of production and promotion of a new generation of products . References: 1. TMS320F206 DIIGITAL SIGNAL PROCESSOR , Texas Instruments Incorporated , 1998. 2 . Gang digital signal processor and its development and application of the principle of Tianjin University Press, 2000.4 3 . Wangnian Xu DSP based system design and application of Beijing University of Aeronautics and Astronautics Press, 2001.8