Because of its low dropout voltage regulator can supply voltage (input) and load voltage (output) pressure difference between small and known. Regulators are not as used to provide a load impedance, input voltage, temperature and time changes and stable power supply voltage. For example, if the lithium battery voltage from 4.2 V (fully charged) down to 2.7 V (almost the whole discharge), while the LDO can be 2.5 V at the load to maintain a constant voltage. The growing portable applications makes the design engineers to consider using LDO to maintain the required system voltage, and has nothing to do with the battery charging status. Portable systems are not the only applications benefit from the LDO, a constant voltage of any need for stability, while enabling high power supply voltage minimum (or be able to handle high power fluctuations) of the device can consider the use of LDO. Typical examples include the use of digital and radio frequency (RF) load circuit.
"Linear" series voltage regulator (see Figure 1) typically includes a reference voltage source, a ratio comparing the output voltage and reference voltage link, a feedback amplifier and a series regulator composition (bipolar transistor or FET) composed of amplifier to maintain control of the pressure drop regulator output voltage requirements. For example, if the load current decreases, causing a significant increase in the output voltage, the error voltage increases, the amplifier's output increases the voltage regulator will increase, so the output voltage back to its original value.

Figure 1 Basic Enhanced PMOS LDO
In Figure 1, the error amplifier and voltage-controlled current source PMOS transistor. The output voltage VOUT by the partial pressure ratio (R1, R2) decreased in proportion, and it with the reference voltage (VREF) comparison. The error amplifier output controls enhanced PMOS transistors.
Regulator "pressure" refers to the output voltage and the pressure difference between the input voltage, if the input voltage continues to decrease so that the circuit can not be regulated. Usually considered when the output voltage falls below the nominal value of 100 mV when to achieve. Characterization of the LDO regulator depends on the key indicators of the load current and adjusting the temperature control of the PN junction.
Pressure on the regulator is divided into three categories: standard voltage regulator, quasi-LDO and LDO.
Standard voltage regulator, usually NPN transistor, the output tube usually drop about 2V.
Quasi-LDO regulator, usually Darlington composite pipe structure (see Figure 2) to be achieved by an NPN transistor and a PNP transistor composed of the regulator. The composite pipe pressure drop, VSAT (PNP) + VBE (NPN) is usually about 1V - higher than the LDO regulator, but lower than the standard.

Quasi-LDO circuit in Figure 2
LDO regulator is usually required to make the best choice under pressure, usually in the pressure range of 100 mV ~ 200 mV. However, LDO's drawback is its ground pin current is usually higher than the standard quasi-LDO regulator or large.
Standards than other types of regulators have greater pressure regulator, larger power consumption and lower efficiency. In most cases LDO regulator can be used instead of the standard voltage regulator, but the LDO regulator should take into account the maximum input voltage regulator low than the standard indicators. In addition, some carefully selected external capacitor LDO need to maintain stability. These three types of regulators at the bandwidth and dynamic stability considerations are also somewhat different.
How to choose the best regulator
For a particular application select the appropriate regulators, need to consider the type and range of input voltage (for example, the front regulator DC / DC converter or switching power supply's output voltage). Other important considerations are: the required output voltage, maximum load current, minimum differential pressure, static current and power consumption. Typically, the regulator may be useful additional features, such as standby pin voltage regulator failure or instruction error flag.
In order to choose the right type of LDO, need to consider the input voltage source. In battery-powered applications, when the battery discharge, LDO must maintain the required system voltage. If the DC input voltage is rectified by the AC power supply, then the pressure is not important, so the standard voltage regulator may be a better choice because of its low prices and can also provide larger load current. But if you need more sophisticated lower power consumption or the output voltage, the LDO is the appropriate choice.
Of course, the regulator should be in the worst working environment under the conditions of the required accuracy can be large enough for the load current.
LDO structure
In Figure 1, the regulator is a PMOS transistor. However, the regulator may use various types of adjustment control, so you can adjust the tube according to the type used by the classification of the LDO. LDO different structures and properties have different advantages and disadvantages. Four types of adjustment tube sample shown in Figure 3, including NPN bipolar transistors, PNP bipolar transistors, transistors and PMOS composite transistors.

Adjust the control sample in Figure 3
For a given supply voltage, the bipolar transistor can provide maximum output current. PNP than NPN, PNP's base as connected with, if necessary, to make the transistor saturated. NPN's base only with the supply voltage connection as high as possible, so that the minimum pressure drop limit to a junction voltage drop VBE. Therefore, NPN and composite pipe can not provide the regulator the pressure is less than 1V. However, they require wide bandwidth and resistance in the capacitive load disturbance is very useful (because of their low output impedance ZOUT characteristics).
PMOS and PNP transistors can quickly reach saturation, which can adjust the tube voltage loss and minimize power consumption, allowing for low dropout, low-power voltage regulator. PMOS transistor to provide the lowest possible voltage drop, about equal to the RDS (ON) × IL. It allows to achieve the lowest quiescent current. PMOS transistor's main drawback is that MOS transistors are commonly used as an external device - especially when control of high current - thus constituting a controller IC, and can not form a complete self-regulator.
A complete total power regulator is PD = (VIN - VOUT) IL + VINIGND
The first part of the above relationship is the power consumption of the regulator; second part is the part of the power circuit controller. Some of the ground current regulator, especially those with bipolar transistor saturation adjustment tube voltage regulator, will be during the peak power.
To ensure the dynamic stability of LDO
Suitable for general application of the traditional design of LDO regulator stability problems. This problem is due to the feedback circuit performance, a variety of possible load, loop change and difficult to obtain components with consistent precision compensation parameters. These considerations are discussed below. LDO typically used at the output of a feedback loop to provide a constant voltage independent of load. Because for any high-gain feedback loop, the loop gain transfer function of the location of poles and zeros are to determine their stability.
NPN-based regulators tube emitter with a low impedance load output, tend to the output very sensitive to capacitive loads. However, based on the PNP tube and PMOS voltage regulator tube has a large output impedance (PNP-based regulator tube collector has a high impedance load). In addition, the loop gain and phase characteristics strongly dependent on the load impedance, therefore require special consideration for stability.
Tube-based PNP LDO and LDO based on PMOS tube of the transfer function has several poles of stability:
• the main pole (Figure 4 P0) the decision by the error amplifier; it is gm amplifier with an internal compensation capacitor CCOMP control and determined. LDO main pole structure of all of the above are common.
• The second pole (P1) by the output resistance (referring to the output capacitor and the load capacitance and load impedance) decision. This makes the application problem difficult to handle because the reactor will affect the loop gain and bandwidth.
• The third pole (P2) by adjusting the tube near the parasitic capacitance. Under the same conditions, PNP power transistor unity gain frequency (fT) fT than the lower NPN transistor.

Figure 4 LDO's frequency response.
Shown in Figure 4, each pole produces 20dB per octave gain of 10 down and with 90 ° phase shift. LDO discussed here because there are multiple poles, so if the unity-gain frequency of the phase shift reaches -180 °, the linear regulator will become unstable. Figure 4 also shows the capacitive loading effect on the regulator, the equivalent series resistance (ESR) increase in the transfer function of a zero (ZESR). Zero help to compensate for the one pole, and if the pole occurs in the unit gain frequency below help to stabilize the loop and maintain the appropriate phase shift frequency is lower than -180 °.
ESR may be crucial for maintaining stability, especially for the use of the vertical PNP transistor's LDO. However, due to the parasitic capacitor characteristics, so the ESR is not always good control. ESR circuit may need to focus within a window to ensure that work in the LDO output current is stable for all regions (see Figure 5).

Figure 5 Stability of output current IOUT with the capacitor ESR and load changes.
While in principle the right choice with an appropriate capacitor ESR (required frequency response curve before passing through 0 dB down fast enough, and before reaching the relevant pole P2 direction to decrease below 0 dB gain full enough) is very difficult. Practical considerations will increase the more difficult: ESR change with the product model; high-volume production using minimum capacitance value required benchmarks, including the minimum ambient temperature and maximum load of the extreme conditions. Capacitor type selection is also important. The most appropriate capacitor is tantalum electrolytic capacitors with high capacity although tantalum electrolytic capacitors is large. Multi-layer ceramic capacitors for the ordinary type can not provide sufficient capacitance LDO, but they that low capacitance for stable new LDO. The size of a small aluminum electrolytic capacitors, but the ESR at low temperatures will deteriorate, and in the -30 ° C the following does not work.