Summary: PCI9050 is a PLX company launched a low-cost PCI protocol interface chip from the model . In this paper, its function, characteristics and applications, showing its use should be noted that some problems , finally give an application example .

1 . Introduction PCI bus is the most widely used and most popular form of high speed synchronous bus with 32bit bus width , bus clock frequency of 0 ~ 33MHZ, the maximum transfer rate of up to 132Mbyte / s, far greater than ISA bus 5Mbyte / s speeds. Moreover, it does not like the ISA bus address as the address and data read and write control signals to the microprocessor to handle both , but independent of the processor , so it can support burst transmission . PCI bus and the CPU has nothing to do , nothing to do with the clock frequency , so it can be applied to a variety of platforms , supports multiple processors and concurrent working . PCI bus protocol is rather complicated , so its interface circuit is also more difficult to achieve them . It not only has a strict synchronization timing requirements , and in order to achieve plug and play and auto- configuration , PCI interface also requires a lot of configuration registers . For the general designer , in order to shorten the development cycle , there is no need to own all of the interface logic to the design , as long as the PCI Interface chip will be able to use common good of the design and development , greatly reduces the work difficult. Are now using more and PLX AMCC company S59XX Series launched in PLX Series . The following will focus on PLX 's PCI9050 interface chip .

2 . PCI9050 Overview PLX PCI9050 is a company launched the expansion adapter card to provide a mixture of high-performance PCI bus target mode of the interface chip , which provides for a small high-performance PCI adapter card Bus Target Interface . ) Hardware design: Interface chip PCI9050 PCI bus signals include interface and local bus interface . Hardware circuit is divided into three parts. The first part is between 9050 and PCI slots to connect the signal line . These signals include the address data multiplexing signals AD [31:0], bus command signals C / BE [3:0] # and the PCI protocol control signal PAR, FRAME #, IRDY #, TRDY #, STOP #, IDSEL, DEVSEL # , PERR #, SERR #. The second part is the connection with the serial EEPROM . There are four signal lines : EESK, EEDO, EEDI, EECS, serial EEPROM data can be burned in advance , you can also line the programming .

The third part is the 9050 connection with the application circuit . In this example , it MT90820 connected , including the LA address bus , LAD data bus , LBE # byte enable signal , LW / R read and write signals 

Software Design: Program is divided into two parts. For the PCI9050 configuration registers as part of each assignment and initialization , as well as part of the main program , the task is to link the PCM signal through MT90820 switch fabric , then through the PCI9050 sent to CPU. The program is not given here, and if you need it, you can purchase it from us.

Conclusion As the PCI bus data throughput , high transfer rate , it is now gradually replacing the PCI bus, ISA bus has become the mainstream . Of course , PCI bus protocol are much more complex , the interface design also increases the difficulty . Currently, there are two ways to design PCI Interface . One is to use ALTERA, XILINX FPGA series and other companies to use their cell library , this approach requires users to directly face of the complex PCI protocol , development period is long and difficult ; Huanyou a kind described above is the use of our PCI Interface Chip , we design, we must more than simple , so widely applied .